The EUROPRACTCE partner Fraunhofer offers its customers access to the following IHP technologies.

SG25SG25 is the basic 0.25 μm CMOS process. It provides NMOS, PMOS, isolated NMOS and passive components such as poly resistors and MIM capacitors. In addition to the basic CMOS process different front-end-of-line options are offered. The standard backend offers 3 thin metal layers a MIM layer and two TopMetal layers (TopMetal1 - fourth 2 μm thick metal layer, TopMetal2 – fifth 3 μm thick metal layer). Together with a high dielectric stack this enables increased RF passive component performance.
SG25H3SG25H3 is a 0.25 μm technology with a set of npn-HBTs ranging from a higher RF performance (fT/fmax = 110/180 GHz) to higher breakdown voltages up to 7 V.
SG25H4SG25H4 is a high performance BiCMOS technology using npn HBT’s with up to 190 GHz transit frequencies and up to 220 GHz oscillation frequencies.
SGB25V SGB25V is a cost-effective technology with a set of npn-HBTs up to a breakdown voltage of 7 V.
SG25H5_EPICSG25H5_EPIC technology is a high performance BiCMOS technology with integrated Silicon Photonic devices. It combines a BiCMOS process with very high bipolar performance 220 GHz transit frequencies and up to 290 GHz maximum oscillation frequencies and photonic devices from SG25_PIC.
SG13SG13 backend for 0.13 µm process offers 5 thin and 2 thick metal layers (TM1: 2 μm TM2: 3 μm).
SG13SSG13S is a high-performance 0.13 μm BiCMOS with npn-HBTs up to fT/fmax = 250/300 GHz, with 3.3 V I/O CMOS and 1.2 V logic CMOS.
SG13CSG13C is an RF CMOS technology which includes all features of SG13S but no bipolar HBTs
SG13G2SG13G2 is a 0.13 μm BiCMOS technology with same device portfolio as SG13S but much higher bipolar performance with fT/fmax = 300/500 GHz.
SG13SCu and SG13G2CuSG13SCu and SG13G2Cu FEOL process SG13S and SG13G2 together with Cu BEOL option from XFAB containing 4 thin Cu layer, 2 3μm Cu layer, a thin Al layer with 2fF/μm MIM capacitor and a 2.8μm Aluminum top layer.
LBEThe Localized Backside Etching module is offered to remove silicon locally to improve passive performance (available in all technologies).
PICAdditional photonic design layers together with BiCMOS BEOL layers on SOI wafers (available in SG25H5_EPIC).
BEOLAluminum Backend of Line is offered in SG13 for testing of passive structures only. Produced are Metal1 and all layers above.
TSVTSV (Through Silicon Via) module is an additional option in SG13S/SG13G2 with advantages like as low inductance, simplified packaging, functionality and distributed ground. It offers TSV structures in 75 μm thick wafer with a backside metallization.
BumpingBumping for Flip Chip assembling bumps (Ni/Au, Ball size 80 μm)

For more detailed information please visit the IHP website.


Cadence-based mixed signal Design Kit is available. For high frequency designs an analog Design Kit in ADS can be used. IHP’s reusable blocks and IPs for wireless and broadband are offered to support your designs.



Customers usually receive 40 diced samples and E-test data including RF measurements. Exceptions are designs using EPIC technology, PIC and TSV module. In this case, only 25 samples will be delivered by default. Original wafer thickness is 750μm. After backlapping standard samples thicknesses of 200μm and 300μm are available without additional costs.

Other backlapping options are available upon request.


Engineering Runs

An Engineering Run consists of a separate mask set and the delivery of 6 wafers. Additional wafers can be purchased upon request.