SCHEDULES & PRICES

2024

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Schedules 2025

2025 RUN SCHEDULES AND PRICES

On this page you can find General MPW and mini@sic run schedules and prices for 2025.

If you need the 2024 schedules, please click here.

There are two prices in the EUROPRACTICE lists: Discounted and Standard.

DISCOUNTED PRICE

Three conditions should be met for Discounted prices:

Customer is an academic institution or a research facility from one of the 27 EU countries together with Albania, Armenia, Azerbaijan, Bosnia-Herzegovina, Georgia, Iceland, Israel, Liechtenstein, North Macedonia, Moldova, Montenegro, Norway, Switzerland, Turkey, Serbia, the UK and Ukraine.
Customer is a registered EUROPRACTICE member who has paid the Full-IC annual membership fee.
The intended design will be done for educational purposes or for publicly funded research.

STANDARD PRICE

Standard prices apply to all other customers.

To reserve your seat on a run, please register your design in the Registration Form or contact the EUROPRACTICE partner responsible for the technology.

TSMC MPW	Jan	Feb	Mar	Apr	May	Jun	Jul	Aug	Sep	Oct	Nov	Dec
TSMC 0.13µm CMOS BCD plus (12-inch)	29				7		23				5
TSMC 0.13µm CMOS Logic or MS/RF, GP or LP (12-inch)	29				7		23				5
TSMC 90nm CMOS Logic or MS/RF, GP or LP						11						10
TSMC 65nm CMOS Logic or MS/RF, GP or LP		5		2	21			27		22
TSMC 40nm CMOS Logic or MS/RF, LP (no triple gate oxide)		5	5	2 23	28		23	27	24	22	19
TSMC 40nm CMOS Logic or MS/RF, GP (no triple gate oxide)			5	23				27
TSMC 28nm CMOS Logic or RF HPC/HPC+		5	12	23	28		2 30		3	29	26
TSMC 22nm CMOS Logic or RF ULL		19	26	23		25		20		1 22
TSMC 16nm CMOS Logic or RF FinFET Compact		5		2	28		23			1	26
TSMC 7nm CMOS Logic or RF FinFET	The N7 MPW deadline for the second half of 2025 will be known at the end of March.

Important notes:

Dates are GDS submission deadlines.

Several TSMC shuttles are extremely loaded. For any technology, please make your design registration as early as possible. We will work with you and do our best to get your design on the run. If required, a waiting list will be created.

Bumping is available upon request for all 12-inch technologies.

Contact eptsmc@imec.be if any of the following options are used: Bumping, MTP/OTP.

TSMC mini@sic	Jan	Feb	Mar	Apr	Jun	Aug	Sep	Oct	Nov
TSMC 0.13µm CMOS BCD plus				30				29
TSMC 65nm CMOS Low Power MS/RF		19		16	18		24		12
TSMC 65nm CMOS GP MS/RF			26					15
TSMC 40nm CMOS Low Power MS/RF			26				17
TSMC 28nm CMOS RF HPC+	29			16	25	27		22
TSMC 16nm CMOS RF FinFET Compact			26						19

Important notes:

Dates are GDS submission deadlines.

Please check additional technology options for TSMC mini@sic:

Please check additional technology options for the TSMC University FinFET Program:

The first MPW run in SINTEF piezoMEMS technologies will take place in early 2025. Please stay tuned for more information.

imec MPW	Jan	Mar	Jun	Sep
imec Si-Photonics Passives+			4
imec Si-Photonics iSiPP50G		12		17
imec GaN-IC on SOI 100V	Coming soon
GaN-IC on SOI 650V	Coming soon

Important notes: Dates indicate deadlines for submission of the first version of the GDS file.
Design registration should be done at least 4 weeks in advance.

Admin. procedure must be finished at least 1 week before the dates indicated in the table.

imec MPW Pricelist Si-Photonics Passives+ ^{1, 2}	Standard EUR	Discounted EUR
Half block – horizontal (5.15mm x 2.5mm) or vertical (2.5mm x 5.15mm)	6,700	6,400
1 block (5.15mm x 5.15mm)	12,800	12,100
2 blocks – horizontal (10.45mm x 5.15mm) or vertical (5.15mm x 10.45mm)	22,700	21,500
4 blocks (10.45mm x 10.45mm)	44,000	42,000
Larger sizes	Please, contact epsiphot@imec.be
Extra Options
Extra set of half block chips (10 samples)	+2,500	+2,200
Extra set of chips (1 block or larger; 20 samples)	+2,500	+2,200
Si-Photonics iSiPP50G ^{1, 2}
Quarter block (2.5mm x 2.5mm)	11,000	10,500
Half block – horizontal (5.15mm x 2.5mm) or vertical (2.5mm x 5.15mm)	22,000	21,000
1 block (5.15mm x 5.15mm)	44,000	42,000
2 blocks – horizontal (10.45mm x 5.15mm) or vertical (5.15mm x 10.45mm)	88,000	83,500
4 blocks (10.45mm x 10.45mm)	165,000	157,000
Larger sizes	Please, contact epsiphot@imec.be
Extra Options
Extra set of quarter block chips (10 samples)	+2,500	+2,200
Extra set of half block chips (10 samples)	+2,500	+2,200
Extra set of chips (1 block or larger; 20 samples)	+2,500	+2,200

Important notes:

¹ There is a new process for the waveguides. Existing users, please be cautious.

² Number of prototypes in standard order depends on design size: 20 for 1 block or larger, 10 for half block or smaller.
Because of typical MPW logistics, we may sometimes deliver more chips than ordered.

imec MPW Pricelist GaN-IC on SOI 200V and 650V	Standard EUR	Discounted EUR
Half block (2.5mm x 5.18mm) *	22,000	20,240
Standard block (5.18mm x 5.18mm)	44,000	40,480
Double block (10.54mm x 5.18mm)	88,000	80,960
Extra Options
Extra set of chips (40 samples)	+5,000	+5,000
Sub-dicing **	+1,000	+1,000

Important notes: Regular number of samples is 40 .
Due to the nature of MPW logistics, more chips than ordered may sometimes be shipped.
* This option is only available to academic institutions.

** Per additional dicing lane, following MPW templates only. Sub-dicing options must be approved by the technical team. Please contact ganmpw@imec-int.com in advance to evaluate your request.

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Schedules and Prices

SCHEDULES & PRICES

2024

2025 RUN SCHEDULES AND PRICES

DISCOUNTED PRICE

STANDARD PRICE