SCHEDULES & PRICES

2021

Schedules 2021

GENERAL MPW & MINI@SIC SCHEDULES - 2021

Here you can find General MPW and mini@sic run schedules and pricelists for 2021.

To reserve your seat on a run, please register your design in the Registration Form or contact the EUROPRACTICE partner responsible for the technology.

PRICELISTS - 2021

There are two prices in the EUROPRACTICE lists: Discounted and Standard.

 
DISCOUNTED PRICE

Three conditions should be met for Discounted prices:

  • Customer is an academic institution or a research facility from one of the 28 EU countries together with Albania, Armenia, Azerbaijan, Belarus, Bosnia-Herzegovina, Georgia, Iceland, Israel, Liechtenstein, North Macedonia, Moldova, Montenegro, Norway, Russia, Switzerland, Turkey, Serbia and Ukraine.
  • Customer is a registered EUROPRACTICE member who has paid the Full-IC annual membership fee.
  • The intended design will be done for educational purposes or for publicly funded research.
 
STANDARD PRICE

Standard prices apply to all other customers.

ams MPW
Jan
Feb
Mar
Apr
May
Jun
Jul
Aug
Sep
Oct
Nov
Dec
ams 0.35µ CMOS C35B4C3 4M/2P/HR/5V IO
22
28
25
ams 0.35µ CMOS C35OPTO 4M/2P/5V IO
22
28
25
ams 0.35µ HV CMOS H35B4D3 120V 4M
3
8
ams 0.35µ SiGe-BiCMOS S35D4M5 /
CMOS-RF C35B4M3 4M/4P Thick MET4 – MIM
2
27

Important notes: Dates are GDS submission deadlines. Design registration must be done at least 2 weeks in advance.

EM Microelectronic MPW
Jan
Feb
Mar
Apr
May
Jun
Jul
Aug
Sep
Oct
Nov
Dec
IC 0.18µm CMOS EMALP18 logic
2
1
4
GLOBALFOUNDRIES MPW
Jan
Feb
Mar
Apr
May
Jun
Jul
Aug
Sep
Oct
Nov
Dec
GLOBALFOUNDRIES SiGe 8XP
15
25
16
22
GLOBALFOUNDRIES 130nm BCDlite
8
12
21
9
13
GLOBALFOUNDRIES 130nm LP
8
12
21
9
13
GLOBALFOUNDRIES 55 nm LPe-RF/LPx-NVM
25
29
25
12
13
13
GLOBALFOUNDRIES 45RFSOI
7
10
6
GLOBALFOUNDRIES 40 nm LP/LP-RF/RF-mmWave
1
14
6
GLOBALFOUNDRIES 28 nm SLPe
15
10
9
6
GLOBALFOUNDRIES 22 nm FDSOI
18
22
17
19
20
8*
GLOBALFOUNDRIES 12 nm LP+
11
12
12
27

Important notes:

Dates are Registration deadlines after which designs cannot be accepted.

Final GDSII file must be submitted within 6 weeks after this date.

* The tapeout deadline for this run is 6 December 2021.

A cancellation fee is applicable if the registration is cancelled later than 2 weeks after the Registration deadline or if the customer is unable to provide a DRC-clean GDS before the Tapeout deadline.

IHP MPW
Jan
Feb
Mar
Apr
May
Jun
Jul
Aug
Sep
Oct
Nov
Dec
IHP SGB25V 0.25µ SiGe:C Bipolar/Analog, Ft/Fmax= 75/95GHz, 5M/MIM, breakdown voltages up to 7V
5
23
22 3
IHP SG25H3 0.25µ SiGe:C Bipolar/Analog, Ft/Fmax= 110/180GHz, 5M/MIM, breakdown voltages up to 7V
5
23
22 2
SG25H5_EPIC Bipolar/Analog, Ft/Fmax= 250/300GHz, 7M/MIM + Photonics
16
22
IHP SG25 PIC (Photonics, Ge Photo-diode, BEOL)
22
30
IHP SG13S SiGe:C Bipolar/Analog, Ft/Fmax= 250/300GHz, 7M/MIM + optional TSV + optional MEMRES (only for the run on 26/11)
11
26 1
25
10
26
IHP SG13C SiGe:C CMOS 7M/MIM
11
26
25
10
26
IHP SG13G2 SiGe:C Bipolar/Analog, Ft/Fmax= 300/500GHz, 7M/MIM + optional TSV
11
26 1
25
10
26
IHP SG13G2Cu FEOL process SG13G2 together with Cu BEOL option
11
26
25 1
10
26
IHP SG13SCu FEOL process SG13S together with Cu BEOL option
11
26
25 1
10
26
IHP BEOL SG13 (M1 and Metal Layers Above) + optional LBE or TSV
26

Important notes: Dates are Registration deadlines. Final GDSII file must be submitted within 10 days after this date.

1 Additional MPW runs offered only when the cumulative area > 10 mm²

2 Additional MPW runs offered only when the cumulative area > 18 mm²

3 Additional MPW runs offered only when the cumulative area > 25 mm²

 

MEMRES is available for the IHP SG13S technology with extra charge only for the runs on 25 June and 26 November

TSV is available for IHP SG13S and SG13G2 technologies with extra charge

Cu Pillar and Bumping are available for all IHP technologies with extra charge

Local Backside Etching (LBE) is not offered for EPIC runs and runs with Cu-BEOL

 
 
onsemi MPW
Jan
Feb
Mar
Apr
May
Jun
Jul
Aug
Sep
Oct
Nov
Dec
ON Semi 0.5µ CMOS EEPROM C5F & C5N – 200 mm
22
26
22
ON Semi 0.35µ C035U – 4M (3M & 5M optional) only thick top metal
25
12
1
13
1
ON Semi 0.35µ C035 – I3T25U 3.3/25 V 4M (3M & 5M optional) only thick top metal
25
12
1
13
1
ON Semi 0.35µ C035 – I3T80U 80 V 4M – 3M optional (5M on special request)
4
1
5
4
ON Semi 0.35µ C035 – I3T50U (E) 50 V 4M – 3M optional (5M on special request)
1
25
1
1
ONC18MS (0.18 µm – 1.8/3.3 V – 15V DMOS – 5LM – MiMC – ESD – HiR – EPI)
1
6
7
9
11
6
ONC18MS-LL (=ONC18MS + High Vt)
1
6
7
9
10
6
ONC18HPA (= ONC18MS + DNW + Zener + Stacked MiMC + Native Dev + Schottky)
1
6
7
9
10
6
ONC18-I4T 45/70V HV CMOS (=ONC18MS + 30V + 45V + 70V DMOS)
1
6
7
9
10
6

Important notes: Dates are GDS submission deadlines. Design registration has to be done at least 3 weeks in advance.

STMicroelectronics MPW
Jan
Feb
Mar
Apr
May
Jun
Jul
Aug
Sep
Oct
Nov
Dec
ST 28nm CMOS28FDSOI
29
20
ST 55nm BiCMOS055
14
2
ST 65nm CMOS065
24
2
ST 130nm BiCMOS9MW
1
24
29
0.16µm BCD8sP
14
17
0.16µm BCD8s-SOI
30

Important notes: Dates are GDS submission deadlines. Design registration has to be done at least 4 weeks in advance.

TSMC MPW
Jan
Feb
Mar
Apr
May
Jun
Jul
Aug
Sep
Oct
Nov
Dec
TSMC 0.18µm CMOS Logic or Mixed-Signal/RF, General Purpose
6
17
10
24
7
21
12
19
30
4
1
29
27
24
23
TSMC 0.18µm CMOS High Voltage BCD Gen 2
6
17
10
24
21
12
30
4
1
29
27
24
23
TSMC 0.13µm CMOS Logic or MS/RF, GP or LP (8-inch)
3
5
4
6
TSMC 0.13µm CMOS Logic or MS/RF, GP or LP (12-inch)
3
7
9
7
1
3
1
TSMC 90nm CMOS Logic or MS/RF, GP or LP
7
7
6
TSMC 65nm CMOS Logic or MS/RF, GP or LP
3
3
21
26
30
28
1
29
27
1
TSMC 40nm CMOS Logic or MS/RF, GP or LP (no triple gate oxide)
10
3
31
28
2
30
4
1
6
3
1
TSMC 28nm CMOS Logic or RF HPC/HPC+
3
3
24
28
2
30
28
25
29
27
24
16
TSMC 16nm CMOS Logic or RF FinFET Compact
10
31
19
28
29
1

Important notes:

Dates are GDS submission deadlines. Design registration must be done at least 3 months in advance.

Bumping is available upon request for all 12-inch technologies.

Contact eptsmc@imec.be if any of the following options are used: Bumping, MTP/OTP, Deep Trench, High Linearity MiM, Schottky Barrier Diode, ULL N/PMOS.

UMC MPW
Jan
Feb
Mar
Apr
May
Jun
Jul
Aug
Sep
Oct
Nov
Dec
UMC 28N Logic/Mixed-Mode – HPC
17
25
UMC 40N Logic/Mixed-Mode – LP
15
19
2
13
29
UMC 65N Logic/Mixed-Mode/RF – LL
8
3
12
4
13
UMC 65N Logic/Mixed-Mode/RF – SP
8
3
12
4
13
UMC L110AE Logic/Mixed-Mode/RF
22
26
28
24
1
UMC L130 Logic
29
11
UMC L130 Mixed-Mode/RF
29
11
UMC L180 Logic GII
8
10
26
8
UMC L180 Mixed-Mode/RF
8
10
26
8
UMC L180 EFLASH Logic GII
29

Important notes: Dates are GDS submission deadlines. Design registration must be done at least 3 weeks in advance.

 

Additional technology options are available:

X-FAB MPW
Jan
Feb
Mar
Apr
May
Jun
Jul
Aug
Sep
Oct
Nov
Dec
XH018 0.18µ HV NVM CMOS E-FLASH
11
26
26
18
XT018 0.18µ HV SOI CMOS
4
29
14
16
11
XS018 0.18µ OPTO *
1
13
XP018 0.18µ NVM CMOS *
8
7
4
XH035 0.35µ HV CMOS
11
30
6
5
XR013 0.13µ RF SOI CMOS *
23
26
25
8
XMB10 MEMS
15

Important notes: Dates are GDS submission deadlines. Registration should be done at least 2 weeks in advance.

* In case of cancellation, there is a possibility to order these technologies by MLM.

 

Please take a look at additional technology options:

AMF MPW
Jan
Feb
Mar
Apr
May
Jun
Jul
Aug
Sep
Oct
Nov
Dec
Si-Photonics fabrication process AMF
22
25

Important notes: Dates are GDS submission deadlines. Please register on myCMP at least 2 weeks in advance.

CEA-Leti MPW
Jan
Feb
Mar
Apr
May
Jun
Jul
Aug
Sep
Oct
Nov
Dec
Photonics IC Si-220 *
15
1
Photonics IC Si-310 **
6
Photonics IC Si3N4-800 ***
12

Important notes:

Dates are GDS submission deadlines. Please register on myCMP at least 2 months in advance.

The indicated leadtime include the 2 months needed for the mask preparation and the 3 weeks dedicated to the tests.

* 300mm run with 220nm SOI and 2µm BOX including passive device and heater (1 metal layer)  ̶  availability of SiN module to be confirmed for the second run

** 300mm run with 310nm SOI and 2µm BOX including passive & active device, heater (2 metal layers)  ̶  availability of SiN module to be confirmed

*** 200mm run with 800nm high-quality LPCVD Si3N4 including passive device

CORNERSTONE MPW
Jan
Feb
Mar
Apr
May
Jun
Jul
Aug
Sep
Oct
Nov
Dec
CORNERSTONE Si-Photonics: 220 nm SOI passives
26
24
CORNERSTONE Si-Photonics: 220 nm SOI actives
26
24
CORNERSTONE Si-Photonics: 340 nm SOI passives
17
CORNERSTONE Si-Photonics: 500 nm SOI passives
25
CORNERSTONE SiN-Photonics
24
17

Important notes: Dates are GDS submission deadlines. Registration should be done at least 4 weeks in advance.

imec MPW
Jan
Feb
Mar
Apr
May
Jun
Jul
Aug
Sep
Oct
Nov
Dec
imec Si-Photonics Passives+
12
13
imec Si-Photonics iSiPP50G
10
25
imec SiN-Photonics BioPIX 300
4
1
imec GaN-IC on SOI 200V
19
imec GaN-IC on SOI 650V
20
20

Important notes: Dates indicate deadlines for both Registration and submission of the first version of the GDS file.

LioniX MPW
Jan
Feb
Mar
Apr
May
Jun
Jul
Aug
Sep
Oct
Nov
Dec
LNX SiN-Photonics TriPleX VIS
15
TBD*
LNX SiN-Photonics TriPleX 1550
31
31
15
LNX SiN-Photonics TriPleX 850
TBD*

Important notes:

Dates are GDS submission deadlines. For registration dates and other details, please contact europratice.gateway@tyndall.ie

TBD * – The exact dates in June for TriPleX VIS and in September for TriPleX 850 are to be defined.

MEMSCAP MPW
Jan
Feb
Mar
Apr
May
Jun
Jul
Aug
Sep
Oct
Nov
Dec
PolyMUMPs
15
26
SOIMUMPS
1
5
2
PiezoMUMPS
11
3
6

Important notes: Dates indicate deadlines for both Registration and submission of the first version of the GDS file.

Teem Photonics MPW
Jan
Feb
Mar
Apr
May
Jun
Jul
Aug
Sep
Oct
Nov
Dec
TP Glass-photonics IC ioNext-NIR
22
21
25
TP Glass-photonics IC ioNext-VIS
22
21
25