On this page you can find General MPW and mini@sic run schedules and prices for 2025.
If you need the 2024 schedules, please click here.
There are two prices in the EUROPRACTICE lists: Discounted and Standard.
Three conditions should be met for Discounted prices:
Standard prices apply to all other customers.
To reserve your seat on a run, please register your design in the Registration Form or contact the EUROPRACTICE partner responsible for the technology.
TSMC MPW | Jan | Feb | Mar | Apr | May | Jun | Jul | Aug | Sep | Oct | Nov | Dec | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
TSMC 0.13µm CMOS BCD plus (12-inch) | 29 | 7 | 23 | 5 | |||||||||
TSMC 0.13µm CMOS Logic or MS/RF, GP or LP (12-inch) | 29 | 7 | 23 | 5 | |||||||||
TSMC 90nm CMOS Logic or MS/RF, GP or LP | 11 | 10 | |||||||||||
TSMC 65nm CMOS Logic or MS/RF, GP or LP | 5 | 2 | 21 | 27 | 22 | ||||||||
TSMC 40nm CMOS Logic or MS/RF, LP (no triple gate oxide) | 5 | 5 | 2 23 | 28 | 23 | 27 | 24 | 22 | 19 | ||||
TSMC 40nm CMOS Logic or MS/RF, GP (no triple gate oxide) | 5 | 23 | 27 | ||||||||||
TSMC 28nm CMOS Logic or RF HPC/HPC+ | 5 | 12 | 23 | 28 | 2 30 | 3 | 29 | 26 | |||||
TSMC 22nm CMOS Logic or RF ULL | 19 | 26 | 23 | 25 | 20 | 1 22 | |||||||
TSMC 16nm CMOS Logic or RF FinFET Compact | 5 | 2 | 28 | 23 | 1 | 26 | |||||||
TSMC 7nm CMOS Logic or RF FinFET | The N7 MPW deadline for the second half of 2025 will be known at the end of March. |
Important notes:
Dates are GDS submission deadlines.
Several TSMC shuttles are extremely loaded. For any technology, please make your design registration as early as possible. We will work with you and do our best to get your design on the run. If required, a waiting list will be created.
Bumping is available upon request for all 12-inch technologies.
Contact eptsmc@imec.be if any of the following options are used: Bumping, MTP/OTP.
We are preparing a new price list and will publish it as soon as it is available.
TSMC mini@sic | Jan | Feb | Mar | Apr | May | Jun | Jul | Aug | Sep | Oct | Nov | Dec | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
TSMC 0.13µm CMOS BCD plus | 30 | 29 | |||||||||||
TSMC 65nm CMOS Low Power MS/RF | 19 | 16 | 18 | 24 | 12 | ||||||||
TSMC 65nm CMOS GP MS/RF | 26 | 15 | |||||||||||
TSMC 40nm CMOS Low Power MS/RF | 26 | 17 | |||||||||||
TSMC 28nm CMOS RF HPC+ | 29 | 16 | 25 | 27 | 22 | ||||||||
TSMC 16nm CMOS RF FinFET Compact | 26 | 19 |
Important notes:
Dates are GDS submission deadlines.
Several TSMC shuttles are extremely loaded. For any technology, please make your design registration as early as possible. We will work with you and do our best to get your design on the run. If required, a waiting list will be created.
Please check additional technology options for TSMC mini@sic:
Please check additional technology options for the TSMC University FinFET Program:
We are preparing a new price list and will publish it as soon as it is available.
The first MPW run in SINTEF piezoMEMS technologies will take place in early 2025. Please stay tuned for more information.