SCHEDULES & PRICES

2024

Schedules 2025

2025 RUN SCHEDULES AND PRICES

On this page you can find General  MPW and mini@sic run schedules and prices for 2025.

If you need the 2024 schedules, please click here.

There are two prices in the EUROPRACTICE lists: Discounted and Standard.

 
DISCOUNTED PRICE

Three conditions should be met for Discounted prices:

  • Customer is an academic institution or a research facility from one of the 27 EU countries together with Albania, Armenia, Azerbaijan, Bosnia-Herzegovina, Georgia, Iceland, Israel, Liechtenstein, North Macedonia, Moldova, Montenegro, Norway, Switzerland, Turkey, Serbia, the UK and Ukraine.
  • Customer is a registered EUROPRACTICE member who has paid the Full-IC annual membership fee.
  • The intended design will be done for educational purposes or for publicly funded research.
 
STANDARD PRICE

Standard prices apply to all other customers.

To reserve your seat on a run, please register your design in the Registration Form or contact the EUROPRACTICE partner responsible for the technology.

Fraunhofer IISB
Jan
Feb
Mar
Apr
May
Jun
Jul
Aug
Sep
Oct
Nov
Dec
4H-SiC CMOS HIGH TEMPERATURE
7

Important notes: Dates are GDS submission deadlines. Design registration must be done at least 4 weeks in advance.

The first design submission (for our review and feedback) must be done on January 10, 2025. Fab-in: March 7, 2025.                                   

For new PDK download please ask virtual-asic@iis.fraunhofer.de

GLOBALFOUNDRIES MPW
Jan
Feb
Mar
Apr
May
Jun
Jul
Aug
Sep
Oct
Nov
Dec
GLOBALFOUNDRIES SiGe 8XP
4
2
8
GLOBALFOUNDRIES 130nm BCDlite – Gen2
1
9
GLOBALFOUNDRIES 55 nm BCDlite
10
25
24
25
GLOBALFOUNDRIES 45RFE
11
2
GLOBALFOUNDRIES 45nm RFSOI
7
8
GLOBALFOUNDRIES 45nm SPCLO – Silicon Photonics
8
19
10
GLOBALFOUNDRIES 28 nm SLPe
27
20
27
GLOBALFOUNDRIES 22 nm FDSOI
13
3
21
12
9
4
30
15
GLOBALFOUNDRIES 12 nm LP+
12
11
10

Important notes: Dates are Registration deadlines after which designs cannot be accepted.

Final GDSII file must be submitted within 6 weeks after this date.

Dates in red are preliminary.

cancellation fee is applicable if the registration is cancelled later than 2 weeks after the Registration deadline or if the customer is unable to provide a DRC-clean GDS before the Tapeout deadline.

TSMC MPW
Jan
Feb
Mar
Apr
May
Jun
Jul
Aug
Sep
Oct
Nov
Dec
TSMC 0.13µm CMOS BCD plus (12-inch)
29
7
23
5
TSMC 0.13µm CMOS Logic or MS/RF, GP or LP (12-inch)
29
7
23
5
TSMC 90nm CMOS Logic or MS/RF, GP or LP
11
10
TSMC 65nm CMOS Logic or MS/RF, GP or LP
5
2
21
27
22
TSMC 40nm CMOS Logic or MS/RF, LP
(no triple gate oxide)
5
5
2
23
28
23
27
24
22
19
TSMC 40nm CMOS Logic or MS/RF, GP
(no triple gate oxide)
5
23
27
TSMC 28nm CMOS Logic or RF HPC/HPC+
5
12
23
28
2
30
3
29
26
TSMC 22nm CMOS Logic or RF ULL
19
26
23
25
20
1
22
TSMC 16nm CMOS Logic or RF FinFET Compact
5
2
28
23
1
26
TSMC 7nm CMOS Logic or RF FinFET
Run planned for 18 December 2024
H2 2025 dates will be known at the end of March

Important notes:

Dates are GDS submission deadlines.

Several TSMC shuttles are extremely loaded. For any technology, please make your design registration as early as possible. We will work with you and do our best to get your design on the run. If required, a waiting list will be created.

 

Bumping is available upon request for all 12-inch technologies.

Contact eptsmc@imec.be if any of the following options are used: Bumping, MTP/OTP.

UMC MPW
Jan
Feb
Mar
Apr
May
Jun
Jul
Aug
Sep
Oct
Nov
Dec
UMC 28N Logic/Mixed-Mode – HPC
3
12
4
10
UMC 40N Logic/Mixed-Mode – LP
17
31
4
1
UMC 65N Logic/Mixed-Mode/RF – LL
14
30
29
UMC L110AE Logic/Mixed-Mode/RF
31
2
1
UMC L180 Logic GII, Mixed-Mode/RF
7
29

Important notes: Dates are GDS submission deadlines. Design registration must be done at least 3 weeks in advance.

 

Additional technology options are available:

imec MPW
Jan
Feb
Mar
Apr
May
Jun
Jul
Aug
Sep
Oct
Nov
Dec
imec Si-Photonics Passives+
4
imec Si-Photonics iSiPP50G
12
17
imec GaN-IC on SOI 100V
Coming soon
GaN-IC on SOI 650V
Coming soon

Important notes: Dates indicate deadlines for submission of the first version of the GDS file.
Design registration should be done at least 4 weeks in advance.

Admin. procedure must be finished at least 1 week before the dates indicated in the table.

Pragmatic MPW
Jan
Feb
Mar
Apr
May
Jun
Jul
Aug
Sep
Oct
Nov
Dec
Helvellyn
3

Important notes:

The calendar for more MPW runs in 2025 will be published soon.

Dates indicate deadlines for submission of the first version of the GDS file. Design registration should be done at least 4 weeks in advance.

Full-wafer runs are possible on demand. Please contact flexicmpw@imec-int.com.

SINTEF PiezoMEMS
Jan
Feb
Mar
Apr
May
Jun
Jul
Aug
Sep
Oct
Nov
Dec
SINTEF PiezoMEMS
17
15

Important notes:

Dates indicate deadlines for submission of the first version of the GDS file. Design registration should be done at least 4 weeks in advance.